Samsung Electronics Co. began mass producing the industry’s first one-terabit (Tb) triple-level cell (TLC) 9th-generation vertical NAND (V-NAND), which stacks up to a record 290 layers by applying advanced technology.

Industry insiders predict that the product will be a game changer in the NAND market as the demand for corporate solid-state drives (SSDs) grows following the expansion of artificial intelligence (AI) technology.

Samsung Electronics announced on Tuesday that it began mass producing the 9th-generation V-NAND, which can implement a double-stack structure. The 9th-generation V-NAND, which follows the 8th-generation, 236-layer V-NAND, is reported to have 290 layers of stacked cells, the highest layer count among mass-produced products in the industry.

NAND is a type of memory semiconductor that can store data even when power is off, and NAND developers previously focused on cramming as many storage spaces or cells as possible into one semiconductor. But there were limitations to this method due to the interference caused by the cells being too close together.

To address this, Samsung Electronics devised a method of stacking NAND chips vertically. By drilling holes in the 3-dimensional space of the flat layers and connecting each layer, it became possible to achieve high capacity in the same area and led to the subsequent intense competition among companies in the NAND market for stacking dominance.

The importance of stacking process technology has thus increased and in terms of V-NAND’s cost competitiveness, the key lies in stacking layers with minimal processes. With fewer stacks, the number of processes decreases, enabling reductions in time and cost as well as greater competitiveness.

The company also strengthened its cost competitiveness and market responsiveness by successfully securing the technology to mass produce the 9th-generation V-NAND with a double-stack structure. The double-stack method involves dividing the NAND flash into two sections via channel hole etching and then combining them into one chip. Samsung Electronics increased productivity throughout this process innovation to boast the largest number of layers in the industry.

Channel hole etching is a technology that sequentially builds mold layers and creates holes for electrons to pass through. As the number of stacking layers increase and more holes are pierced at once, precision and sophistication are required for increased production efficiency.

Samsung Electronics’ latest 1Tb TLC 9th-generation V-NAND has a bit density, or the number of bits stored per unit area, that is around 1.5 times larger than the previous generation, and the product has the smallest cell size and mold thickness in the industry.

The 9th-generation V-NAND is equipped with low-power design technology, improving power consumption by about 10 percent compared to the previous generation.

The mass production of Samsung Electronics’ 9th-generation V-NAND coincides with the expansion of demand for high-capacity and high-performance NAND chips with the advent of the AI era. According to market research firm Omdia, NAND flash revenue is projected to grow at an annual average of 24 percent to $114.9 billion in 2028 from $38.7 billion in 2023.

Server companies have increased significantly increased their purchases of AI servers since the second half of 2023, leading to a substantial increase in demand for enterprise SSDs. As training methods evolve with data such as video and audio, requiring larger storage capacities than text-based data, the demand for SSDs is also expected to increase further. Omdia added that larger capacities are needed for storing data for large language models and inference models.

Samsung Electronics plans to accelerate the development of high-capacity and high-performance NAND chips demanded in the AI era, such as mass-producing quad level cell (QLC) 9th-generation V-NAND in the latter half of 2024.

By Choi Seung-jin and Lee Eun-joo

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