SK Hynix Inc., the world’s second-largest memory chipmaker, on Wednesday claimed it has migrated to terabit (Tb) digital storage dimension by commercializing flash memory chips on 128-layer 4D (four-dimensional) wafer.

The milestone was achieved in just eight months since it announced the world’s first 96-layer 512 Gb (gigabit) 4D flash in October last year. As with the 96-layer, the 128-layer chips are based on triple level cell (TLC) arrays with 40 percent greater bit productivity per wafer.

Shares of SK Hynix long battered by negative news for the industry gained 3 percent on the technology breakthrough.

The latest 128-layer NAND chip offers the industry’s highest vertical stacking, allowing more than 360 billion NAND cells that each stores 3 bits per single chip. SK Hynix applied ultra-homogeneous vertical etching technology, high-reliability multi-layer thin-film cell formation technology, and ultra-fast low-power circuit design, to its self-developed 4D NAND technology.

The product, in particular, offers the industry’s highest density of 1Tb for TLC NAND flash. In the past, a number of companies including SK Hynix has developed 1 Tb quadruple level cell (QLC) NAND flash in 96 layer form, but SK Hynix is the first in the industry to commercialize 1Tb TLC NAND flash.

SK Hynix said that it was able to develop the high density NAND as it took advantage of its small chip size.

4D NAND flash, meanwhile, is an innovative product developed for the first time in the world by SK Hynix in October, last year, combining charge trap flash (CTF) and periphery under cell (PUC) technologies. It integrates existing 3D CTF technology and PUC technology that stacks circuits under the cell. The new product is compared to how an outdoor parking lot has been transformed into an underground parking lot, allowing more space efficiency.

The new 128-layer 1Tb 4D NAND flash has increased bit productivity per wafer by 40 percent compared to the previous 96-layer one. Applying PUC to the same product also increases productivity by 15 percent or more, the company said.

Industry experts noted that NAND flash technology is becoming more complex and difficult to develop, with increased number of manufacturing processes. For the latest development, however, SK Hynix has used the same 4D platform and has optimized manufacturing process to stack 32 additional layers on the existing 96-layer NAND and reduced total number of manufacturing processes by 5 percent. The investment cost for the transition to 128-layer NAND flash has been reduced by 60 percent compared to the previous generation. In particular, the development is significant in that the company announced the 128-layer NAND flash in only 8 months after it introduced the 96-layer NAND flash by using existing CTF-based 96-layer 4D NAND processing platform that was developed for the first time in the world in October, last year.

SK Hynix plans to sell mass-produced 128-layer 4D NAND flash from the second half of this year and offer various solutions.

The latest product has four planes inside a single chip, allowing data transfer rate of 1,400 megabits per second at 1.2 voltage, offering high-performance low-power mobile solution and corporate-use solid-state drive.

Oh Jong-hoon, executive vice president at SK Hynix, said that the development of 128-layer 4D NAND flash has allowed the company to secure fundamental competitiveness of its NAND business and that it plans to provide customers with a variety of solutions at the right time with the industry’s best stacking and density capacity.

By Hwang Soon-min and Lee Eun-joo

[ⓒ Pulse by Maeil Business Newspaper & mk.co.kr, All rights reserved]